What Substrates Are Used For Lithography?

university wafer substrates

Pattern Silicon Using Lithography

A graduate research assistant studying at a nanoscale science and engineering department requested the following quote.

My research group is looking to deposit a Bi (Bismuth) and Sb (Antimony) bilayer on top of a 500nm Si3N4 on Si wafer (4 inches). The thickness of the bilayer we are looking to deposit is between 50-100nm Bi and 50-100nm Sb. Please send me a quote for this process and whether it can be done using evaporation, sputtering, and/or electrodeposition using a Si3N4 substrate.

We have the wafers here. We just want to send them out to get a Sb/Bi bilayer deposition after we pattern them using lithography. We would only be sending you 1 (or 2 max) wafers to receive the bilayer deposition.  
The Si3N4 is 500 nm thick on top of (100) Si. These are 4 inch wafers.

Reference #90333 for specs and pricing.

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25.mm Silicon Wafers for E-Beram Lithography

A PhD candidate requested the following quote.

I want to buy a kind of wafer. The requirement of my wafer is that they won't dissolve in organic solvent (like chloroform) for a long time up to 2 days. Also the thickness of my wafer should be about 1 cm. The wafers are for e beam lithography. Do you have that kind of wafer. I need a lot. Thanks!

Reference #91942 for specs and pricing.

What Is The History of Lithography in the Semiconductor Industry?

The history of lithography in the semiconductor industry is a fascinating journey of technological innovation and evolution, closely tied to the development of the modern computing and electronics industries. Below is a high-level timeline highlighting key milestones in the history of lithography:

1. Origins and Early Developments (1950s–1960s)

  • 1950s: Lithography began with photolithography techniques adapted from printing and photographic technologies. UV light was usedmodern semiconductor lithography machine, showcasing its design and components in a cleanroom environmen to transfer patterns from masks to photoresist on silicon wafers.
  • Late 1950s: Jack Kilby and Robert Noyce independently invented the integrated circuit (IC), sparking the need for precise and scalable lithographic techniques to define circuit patterns.
  • 1960s: Contact printing, where the mask was in direct contact with the photoresist-coated wafer, was widely used but prone to mask damage and contamination.

2. Projection and Stepper Lithography (1970s)

  • Early 1970s: Proximity printing replaced contact printing, increasing mask life by maintaining a small gap between the mask and wafer.
  • 1978: The first step-and-repeat projection aligner (stepper) was introduced by GCA. Steppers revolutionized lithography by using a lens system to project and reduce the image of the mask, allowing for finer resolution and improved overlay accuracy.

3. Advent of Deep UV Lithography (1980s)

  • 1980s: The industry transitioned to deep ultraviolet (DUV) lithography, using wavelengths of 248 nm (produced by krypton fluoride excimer lasers) to achieve smaller feature sizes.
  • This era saw the introduction of advanced resist materials and the beginning of Moore's Law scaling, with feature sizes shrinking below 1 µm.

4. Immersion Lithography and Sub-100 nm Nodes (1990s–2000s)

  • 1990s: Lithography advanced to 193 nm wavelengths (argon fluoride excimer lasers). Resolution enhancement techniques (RET), such as optical proximity correction (OPC) and phase-shift masks, were developed to extend the capabilities of DUV lithography.
  • 2000s: Immersion lithography was introduced, using water or other fluids between the lens and wafer to improve resolution by increasing the numerical aperture (NA) of the system.

5. Extreme Ultraviolet (EUV) Lithography (2010s–Present)

  • 2010s: After decades of research and investment, EUV lithography, using a wavelength of 13.5 nm, became commercially viable for high-volume manufacturing at the 7 nm node and beyond.
  • EUV required breakthroughs in light source power, reflective optics, and photoresist materials. Companies like ASML played a critical role in its development.
  • EUV enables further scaling, supporting nodes as small as 2 nm.

6. Current and Emerging Technologies

  • High-NA EUV (2020s): High numerical aperture EUV lithography systems are being developed to enable sub-2 nm feature sizes, with enhanced resolution and process control.
  • Directed Self-Assembly (DSA): Researchers are exploring DSA as a complementary technology, where block copolymers self-assemble into nanoscale patterns guided by lithographically defined templates.
  • Nanoimprint Lithography (NIL): Although less common, NIL is being explored for specific applications, such as high-resolution patterning at low cost.

7. Future Directions

  • The semiconductor industry continues to explore alternative lithography technologies, such as maskless lithography using electron beams and X-ray lithography, to push beyond current limitations.
  • Advances in machine learning and artificial intelligence are being integrated into lithographic patterning to improve defect detection and process optimization.

Key Takeaways

Lithography has consistently been the primary driver of Moore's Law, enabling the miniaturization of transistors and the densification of circuits. Each generational advance in lithography represents a confluence of innovation in optics, materials science, and engineering, making it one of the most complex and crucial technologies in semiconductor manufacturing.

How does Lithography Work in Nanotechnology?

Lithography in nanotechnology is a core process used to create patterns and structures on a nanoscale, enabling the fabrication of micro- and nanodevices like integrated circuits, MEMS, and nanosensors. Below is an overview of how lithography works in nanotechnology:

1. Basics of Lithography

Lithography is a patterning technique where a light-sensitive material, called a photoresist, is exposed to a source of energy (usually light or electrons) through a mask or directly using a focused beam. The exposed areas of the resist change their chemical properties, enabling selective material removal or deposition.

2. Key Steps in the Lithography Process

a. Substrate Preparation

  • A clean and flat substrate, such as a silicon wafer, is coated with a thin film of photoresist.
  • This layer is typically deposited using spin coating to achieve uniform thickness.

b. Exposure

  • The resist is exposed to a patterned source of energy:
    • Photolithography: UV or EUV light.
    • Electron Beam Lithography (EBL): A focused electron beam.
    • Nanoimprint Lithography (NIL): A physical mold is pressed into the resist.
  • The mask contains the desired pattern and determines which areas of the resist are exposed.

c. Development

  • After exposure, the resist is developed using a chemical solution.
    • In a positive resist, the exposed areas become soluble and are removed.
    • In a negative resist, the exposed areas harden and the unexposed regions are removed.

d. Pattern Transfer

  • The developed resist pattern is used as a stencil for subsequent processes like etching, deposition, or ion implantation.
  • Dry etching (e.g., plasma etching) or wet etching removes the unprotected parts of the substrate.

e. Resist Removal

  • After the pattern transfer, the resist is stripped off, leaving behind the patterned features on the substrate.

3. Techniques in Nanotechnology Lithography

a. Photolithography

  • Uses light to define patterns.
  • Limited by the diffraction of light, requiring shorter wavelengths (e.g., deep UV or EUV) and resolution enhancement techniques for nanoscale patterning.

b. Electron Beam Lithography (EBL)

  • A focused electron beam directly writes the pattern without a mask, achieving resolutions below 10 nm.
  • Ideal for research and prototyping but slow for large-scale manufacturing.

c. Nanoimprint Lithography (NIL)

  • A mold with nanoscale features is pressed into a resist layer.
  • Enables high-resolution and cost-effective patterning but has challenges with mold defects and alignment.

d. Extreme Ultraviolet (EUV) Lithography

  • Uses EUV light at a 13.5 nm wavelength, enabling feature sizes below 10 nm.
  • Requires reflective optics and advanced resist materials.

e. Directed Self-Assembly (DSA)

  • Exploits block copolymers that self-assemble into nanoscale patterns guided by lithographically defined templates.
  • Combines top-down and bottom-up approaches for sub-10 nm patterning.

4. Challenges in Lithography for Nanotechnology

  • Resolution Limits: Achieving smaller feature sizes requires shorter wavelengths, higher numerical apertures, and precise alignment.
  • Defects: Ensuring pattern fidelity and minimizing defects are critical for reliable device performance.
  • Cost: Advanced lithographic tools (e.g., EUV) are extremely expensive and complex to maintain.
  • Material Challenges: Developing resists that can handle high-energy exposure and enable finer patterning is an ongoing area of research.

5. Applications in Nanotechnology

Lithography is essential in creating:

  • Integrated Circuits (ICs): Transistor gates and interconnects with nanoscale dimensions.
  • Micro- and Nanosensors: Patterns for biosensors, pressure sensors, and accelerometers.
  • MEMS/NEMS Devices: Micro- and nanoscale electromechanical systems.
  • Photonic Devices: Waveguides and gratings for nanophotonics.
  • Quantum Devices: Nanostructures for qubits and quantum dots.

6. Advances and Future Directions

  • High-NA EUV Lithography: To achieve sub-2 nm feature sizes.
  • AI in Lithography: For optimizing pattern designs and defect detection.
  • Alternative Methods: Research into maskless and holographic lithography for specific applications.

Lithography in nanotechnology is pivotal to scaling down devices, enabling higher performance, lower power consumption, and greater functionality in advanced materials and electronics.