What is RCA Cleaning?

university wafer substrates

Are Silicon Wafers RCA Cleaned Before Film Deposition?

A senior research engineer requested help with the following.

How clean are these wafers? Do they need RCA cleaning prior to use (dep of film)? I am interested in 25 (or odd  number box if discounted) of the 100 mm 500 micrometer DSP ones. I might also be interested in 200< and/or 300 micrometer 100mm prime DSP ones. Probably 25 or 50 depending on price.

UniversityWafer, Inc. Answered:

These wafers are cleaned and sealed!  For the thinner wafers, what other specs would you need?

Reference #135626 for specs and pricing.

RCA Chemical Cleaning Silicon Wafers

A university research associate requested a quote for the following.

We have bought test grade Si wafer from you, but we could not remove the native oxide from Si wafer using even RCA chemical cleaning process and heat upto 850C inside MBE system.

How can we remove the native oxide?

Reference #60208-3108 for instructions.

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Do You RCA Clean Silicon Wafers Before Oxidation?

Yes, RCA cleaning is typically performed before oxidation to ensure the silicon wafer surface is free from organic contaminants, metallic impurities, and particulate matter. Oxidation, whether thermal or chemical, relies on a pristine silicon surface to grow a high-quality, uniform oxide layer.

Standard RCA Cleaning Steps:

  1. SC-1 (Standard Clean 1) – Organic and Particle Removal

    • Mix: 5:1:1 H₂O : NH₄OH : H₂O₂
    • Temperature: 75–80°C
    • Duration: 10–15 minutes
    • Purpose: Removes organic residues and particles while slightly oxidizing the surface.

  2. SC-2 (Standard Clean 2) – Metallic Contaminant Removal

    • Mix: 6:1:1 H₂O : HCl : H₂O₂
    • Temperature: 75–80°C
    • Duration: 10–15 minutes
    • Purpose: Removes metallic contaminants and prepares a cleaner surface.

  3. Final HF Dip (Optional, Before Oxidation)

    • Mix: Dilute HF (e.g., 1% HF or 50:1 HF/H₂O)
    • Duration: 15–30 seconds
    • Purpose: Removes native oxide, leaving a hydrogen-terminated surface, which helps achieve better control over initial oxide growth.

Considerations:

  • For Dry Oxidation: A final HF dip is usually performed just before oxidation to remove native oxide and ensure a clean, controlled oxide growth.
  • For Wet Oxidation: Native oxide removal is less critical, and some processes omit the HF dip.
  • Particle Contamination: Ensure DI water rinse and drying (e.g., spin-dry or N₂ blow-dry) to prevent watermarks.

Guidance on Specific Oxidation Conditions?

The oxidation conditions depend on whether you're performing dry oxidation (for high-quality, dense oxides) or wet oxidation (for faster growth but lower density). Here’s a breakdown of both methods:

1. Dry Thermal Oxidation (Si + O₂ → SiO₂)

  • Best for: High-quality, thin oxides (e.g., gate oxides, precision dielectric layers)
  • Typical Temperature: 900–1100°C
  • Oxygen Source: Pure O₂ gas
  • Growth Rate: ~10–30 nm/hr (slow)
  • Oxide Quality: Dense, low defect density, high electrical reliability
  • Typical Use Cases: MOSFET gate oxides, passivation layers

Process Flow:

  1. RCA clean the silicon wafer.
  2. (Optional) HF dip to remove native oxide.
  3. Load wafers into a furnace at ~900–1100°C.
  4. Flow dry O₂ into the furnace.
  5. Oxidation time varies based on the target oxide thickness (e.g., ~2 hours for ~50 nm).
  6. Cool down under nitrogen or in an inert atmosphere.

2. Wet Thermal Oxidation (Si + H₂O → SiO₂ + H₂)

  • Best for: Thicker oxides (e.g., field oxides, passivation layers)
  • Typical Temperature: 900–1100°C
  • Water Source: Steam (H₂ + O₂ reaction or direct H₂O vapor injection)
  • Growth Rate: ~100–300 nm/hr (faster than dry oxidation)
  • Oxide Quality: Slightly lower density than dry oxidation but good for thicker layers
  • Typical Use Cases: Field oxide, LOCOS isolation, MEMS devices

Process Flow:

  1. RCA clean the silicon wafer.
  2. (Optional) HF dip to remove native oxide.
  3. Load wafers into a furnace at ~900–1100°C.
  4. Flow O₂ + H₂O (steam) into the furnace.
  5. Oxidation time depends on the thickness target (e.g., ~1 hour for 500 nm).
  6. Cool down under nitrogen.

Oxide Thickness Control

  • Dry oxidation grows at a slower, more controlled rate, making it ideal for thin layers.
  • Wet oxidation grows quickly, making it more suitable for thick oxides.
  • Growth follows Deal-Grove kinetics, where:
    • Initial oxidation is linear (surface reaction-limited).
    • Later oxidation is parabolic (diffusion-limited).

For example, at 1000°C:

  • Dry oxidation: ~23 nm in 1 hour, ~50 nm in 2 hours.
  • Wet oxidation: ~100 nm in 10 min, ~500 nm in 1 hour.

Key Considerations

  • Pre-oxidation HF dip? Needed for precise dry oxidation but sometimes skipped for wet oxidation.
  • Dopant Effects? Heavily doped wafers (especially boron-doped) oxidize faster.
  • Post-Oxidation Annealing? Sometimes used in nitrogen (N₂) to improve oxide quality.

Would you like a specific recipe for your oxide thickness target?

 

 

 

RCA Cleaning Silicon To "Back Gate" Molecular Electronic Devices

A PhD candidate requested a quote for the following.

Recently I have undertaken a research project where I am trying to apply a "back gate" to some molecular electronic devices I have been working with.

I have p-doped silicon wafers that I have been attempting to oxidize in a quartz tube furnace in order to make a silicon dioxide.  I have been attempting to use an "old fashioned" method of using an RCA 1 and 2 cleaning followed by HF etching, then oxidizing using a dry-wet-dry system.

Even at thicknesses up to about 500nm (based on time and thin film color), the dielectrics leak terribly.  I suspect they are riddled with defects and holes.

I've decided to cut my losses and purchase purchase wafers that were pre-oxidized.

Do you have a recomendation for a p-doped silicon wafer that would work for this application?  Also, what SiO2 dielectric thickness would be appropriate for a back gated device?

Reference #129593 for specs and pricing.

What Silicon Wafer Grades Can Be RCA Cleaned?

What is the difference between test grade and mechanical grade wafers? I know that mechanical grade is of worse quality and suitable for spin coating; is there any issue with piranha, RCA, HF clean, or plasma< treating such a surface?

Reference # for specs and pricing.

RCA Cleaning and Silicon Wafers

A postdoc request an answer to the following question.

Can you please help me understand what type of wafer cleaning process is used before silicon wafers packaged and RCA cleaning process for silicon wafers in a semiconductor lab.shipped to me? I’m mostly curious as to if the wafers go through an RCA clean (sometimes called Standard Cleans 1 & 2 or Huang A & B) or other type of cleans before they are packaged and shipped. The item in question is 695. or reference #272220 for specs and pricing.

There are several types of wafer cleaning processes that are commonly used before silicon wafers are packaged and shipped. These include:

  1. RCA Cleaning: RCA cleaning is a standard cleaning process that uses a combination of chemicals, including deionized water, hydrogen peroxide, and ammonium hydroxide, to remove particles and other contaminants from the wafer surface.

  2. Ultrasonic Cleaning: Ultrasonic cleaning uses high-frequency sound waves to agitate a cleaning solution and remove particles and other contaminants from the wafer surface.

  3. Spray cleaning: The wafer is sprayed with cleaning solution and then rinsed with deionized water to remove particles and other contaminants from the wafer surface.

  4. Megasonic cleaning: This uses high-frequency sound waves to agitate cleaning solution and remove particles and other contaminants from the wafer surface. It is more effective than ultrasonic cleaning and is used for cleaning submicron feature sizes.

  5. Dry cleaning: This process uses a gas or plasma to remove particles and other contaminants from the wafer surface. It is used for cleaning the wafer surface before the deposition of thin films or before the patterning process.

It is important to mention that the cleaning process depends on the specific application and the process flow of the fab.

Cleaning Silicon Wafers after Dry Thermal Oxide Deposition

A university researcher asked the following question:

I want to have a quote of Dry(O2) Thermal Silicon Dioxide(SiO2) on 4" p-type Si (low resistivity). I want to evaluate my devices performance on these oxide wafer first, so please also indicate the minimum purchased numbers of wafers. 

Because the Silicon Dioxide will be used as dielectric layer, Si wafer should be under RCA clean and HF dipped before oxidation. The p-type Silicon (100) (boron doped) wafer will be used as bottom common gate, so the resistivity has to be low (0.001~0.005 ohm-cm).
Two different thickness of silicon dioxide are needed: 35nm and 50nm.  Uniformity within wafer should be +/-1%.

Reference #157031 for the answer.

RCA Cleaning Silicon Wafers For Low Surface Roughness

An associate professor researching power electronics requested a quote for the following.

I need some Si wafers asap please:

  1. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (001) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 0 deg offcut, 0.001-0.01 Ohm-cm.
  2. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (001) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 4 deg offcut, 0.001-0.01 Ohm-cm.
  3. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (111) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 0 deg offcut, 0.001-0.01 Ohm-cm.
  4. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (011) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 0 deg offcut, 0.001-0.01 Ohm-cm. The most important is 4deg offcut wafers.

UniversityWafer, Inc. Quoted:

1. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (001) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 0 deg offcutt, 0.001-0.01 Ohm-cm

2. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (001) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 4 deg offcutt, 0.001-0.01 Ohm-cm

3. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (111) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 0 deg offcutt, 0.001-0.01 Ohm-cm

4. 25 x Si 100mm diameter, prime grade, RCA cleaned, Ra<0.1nm, (011) orientation, SSP/DSP (doesn't matter), 500um thick, n-type (P doped), 0 deg offcutt, 0.001-0.01 Ohm-cm

Reference #262973 for specs and pricing.