What is Dislocation Density? 

Dislocation density is a critical measurement of crystal quality in silicon wafers, semiconductor ingots, and advanced substrates such as GaAs wafers,GaP wafers, and AlN on sapphire. Learn how crystal defects are measured using etch pit density (EPD), X-ray diffraction (XRD), and transmission electron microscopy (TEM), and how low dislocation density can improve semiconductor device performance, epitaxial growth quality, and material reliability.

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Low Dislocation Density Silicon Wafers and Ingots

A Ph.D. researcher in electrical engineering requested high-purity silicon wafers and silicon ingots with light p-type boron doping and low dislocation density. These materials are used when researchers need high crystal quality, low defect density, and uniform electrical performance for semiconductor device research.

Research request: High-purity silicon wafers or ingots with p-type doping below 2E16 cm-3, lightly boron-doped silicon, low dislocation density, and 2 inch to 4 inch diameter material for a large-quantity research order.

Reference #285127 for specs and pricing.

Why Low Dislocation Density Matters

Dislocation density is an important crystal quality specification for silicon wafers and ingots. Lower dislocation density can help improve wafer uniformity, reduce crystal defects, and support better performance in sensitive semiconductor applications such as detectors, MEMS, epitaxy, photonics, and high-resistivity silicon research.

Researchers commonly request low dislocation density silicon with specific requirements for:

  • Wafer diameter, including 2 inch, 3 inch, and 4 inch silicon wafers
  • Dopant type, including boron-doped p-type silicon
  • Low doping concentration or high-purity silicon
  • Crystal orientation such as <100>, <110>, or <111>
  • Resistivity range and thickness tolerance
  • Single-side polish, double-side polish, or ingot form

Get Your Low Dislocation Density Silicon Quote FAST! Or, Buy Online and start researching today.





Dislocation Density of AlN on Sapphire Substrates

A postdoctoral researcher also requested undoped AlN on sapphire substrates grown by MOCVD. The request included 2 inch c-axis and m-axis oriented AlN on sapphire with 1000nm and 2000nm film thicknesses, plus key specifications such as band gap, residual doping, dislocation density, and resistivity.

Research request: Undoped AlN on sapphire, 2 inch diameter, c-axis or m-axis orientation, 1000nm to 2000nm AlN thickness, MOCVD growth, and detailed material specifications for dislocation density, residual doping, resistivity, and band gap.

Reference #262030 for specs and pricing.

UniversityWafer, Inc. supplies AlN, AlGaN, and GaN on sapphire substrates for optoelectronics, UV devices, RF research, MEMS, and semiconductor material characterization.

What Is Dislocation Density in Semiconductor Wafers?

Dislocation density is a measurement of crystal defects in a semiconductor material. In silicon wafers, GaAs, GaP, AlN on sapphire, and other single crystal substrates, dislocations can affect device performance, wafer quality, carrier lifetime, leakage current, mechanical strength, and epitaxial layer growth.

dislocation density in GaAs GaP and silicon wafersFor semiconductor researchers, low dislocation density is usually preferred because fewer crystal defects can improve material uniformity and device reliability. Dislocation density is especially important for high-purity silicon wafers, lightly doped silicon ingots, epitaxial wafers, compound semiconductors, and substrates used for optoelectronic or power device research.

Why Dislocation Density Matters

Dislocations are line defects inside a crystal lattice. In semiconductor wafers, these defects can influence electrical, optical, and mechanical properties. A wafer with high dislocation density may have more recombination centers, non-uniform current flow, lower breakdown performance, or reduced yield in sensitive devices.

Dislocation density is an important specification for:

Dislocation Density and Wafer Orientation

Crystal orientation can influence wafer processing, cleavage behavior, etching, epitaxy, and device design. Common silicon wafer orientations include <100>, <110>, and <111>. The best orientation depends on the device structure, surface chemistry, lithography process, and required electrical behavior.

For example, <100> silicon is commonly used in CMOS and MEMS processing, while <111> silicon may be selected for specific etching, mechanical, or crystal growth applications. When low dislocation density is required, researchers should specify orientation, dopant, resistivity, diameter, thickness, polish, and growth method.

How Dislocation Density Is Measured

Dislocation density can be evaluated with several crystal characterization methods. The most common techniques include etch pit density (EPD), X-ray diffraction (XRD), transmission electron microscopy (TEM), and optical inspection after selective etching.

Etch pit density is often used to estimate the number of dislocations that intersect the wafer surface. After chemical etching, dislocations appear as small pits that can be counted under an optical microscope. EPD is commonly reported as defects per square centimeter.

XRD can help evaluate crystal quality, strain, lattice mismatch, and rocking curve width. TEM can image individual defects at high resolution and is useful for studying localized dislocations, misfit dislocations, and epitaxial layer defects.

Dislocation Density in Silicon Wafers and Ingots

Low dislocation density silicon wafers are important for high-performance semiconductor research, detector substrates, power devices, MEMS, photonics, and thin film deposition. Researchers may request p-type silicon wafers, n-type wafers, intrinsic silicon, or lightly doped ingots depending on the application.

For high-purity silicon, low dislocation density can support better uniformity across the wafer and reduce defect-related performance problems. When ordering wafers, researchers should include the required dopant, resistivity range, orientation, diameter, thickness, surface finish, and any dislocation density or EPD requirement.

Dislocation Density in AlN on Sapphire

Dislocation density is also critical for MOCVD-grown AlN on sapphire and related nitride materials. AlN, GaN, and AlGaN layers can contain threading dislocations caused by lattice mismatch, thermal expansion differences, and growth conditions.

Researchers requesting AlN on sapphire often ask for details such as crystal orientation, layer thickness, band gap, residual doping, resistivity, and dislocation density. These specifications help determine whether the material is suitable for UV optoelectronics, RF devices, sensors, or semiconductor research.

Low Dislocation Density Substrates for Research

UniversityWafer, Inc. supplies semiconductor wafers and crystal substrates for researchers who need controlled crystal quality, low defect density, and custom specifications. Available materials include silicon, sapphire, GaAs, GaP, GaN on sapphire, AlN on sapphire, silicon carbide, germanium, quartz, and oxide-coated wafers.

Related Crystal Quality and Semiconductor Wafer Resources